Engineering Questions with Answers - Multiple Choice Questions

MCQs on the Keyboard/Display Controller 8279

1 - Question

The registers that store the keyboard and display modes and operations programmed by CPU are
a) I/O control and data buffers
b) Control and timing registers
c) Return buffers
d) Display address registers

View Answer

Answer: b
Explanation: The control and timing register to store the keyboard and display modes and other operations programmed by CPU.




2 - Question

The sensor RAM acts as 8-byte first-in-first-out RAM in
a) keyboard mode
b) strobed input mode
c) keyboard and strobed input mode
d) scanned sensor matrix mode

View Answer

Answer: c
Explanation: In this mode, each key code of the pressed key is entered in the order of the entry, and in the meantime, read by the CPU, till the RAM becomes empty.




3 - Question

The registers that hold the address of the word currently being written by the CPU from the display RAM are
a) control and timing register
b) control and timing register and timing control
c) display RAM
d) display address registers

View Answer

Answer: d
Explanation: The display address registers holds the address of the word currently being written or read by the CPU to or from the display RAM.




4 - Question

When a key is pressed, a debounce logic comes into operation in
a) scanned keyboard special error mode
b) scanned keyboard with N-key rollover
c) scanned keyboard mode with 2 key lockout
d) sensor matrix mode

View Answer

Answer: c
Explanation: In scanned keyboard mode with 2 key lockout mode of operation, when a key is pressed, a debounce logic comes into operation. During the next two scans, other keys are checked for closure and if no other key is pressed then the first pressed key is identified.




5 - Question

The mode that is programmed using “end interrupt/error mode set command” is
a) scanned keyboard special error mode
b) scanned keyboard with N-key rollover
c) scanned keyboard mode with 2 key lockout
d) sensor matrix mode

View Answer

Answer: a
Explanation: The scanned keyboard special error mode is programmed using end interrupt/error mode set command. This mode is valid only under the N-key rollover mode.




6 - Question

When a key is pressed, the debounce circuit waits for 2 keyboard scans and then checks whether the key is still depressed in
a) scanned keyboard special error mode
b) scanned keyboard with N-key rollover
c) scanned keyboard mode with 2 key lockout
d) sensor matrix mode

View Answer

Answer: b
Explanation: In this mode, When a key is pressed, the debounce circuit waits for 2 keyboard scans and then checks whether the key is still depressed. If it is still depressed, the code is entered in FIFO RAM.




7 - Question

The data that is entered from the left side of the display unit is of
a) left entry mode
b) right entry mode
c) left and right entry modes
d) none

View Answer

Answer: a
Explanation: The data that is entered from the left side of the display unit is of left entry mode, as in a type-writer the first character typed appears at the left-most position, while the subsequent characters appear successively to the right of the first one.




8 - Question

The FIFO status word is used to indicate the error in
a) keyboard mode
b) strobed input mode
c) keyboard and strobed input mode
d) scanned sensor matrix mode

View Answer

Answer: c
Explanation: Overrun error occurs when an already full FIFO has attempted an entry. Underrun error occurs when an empty FIFO read is attempted.




9 - Question

The flag that increments automatically after each read or write operation to the display RAM is
a) IF
b) RF
c) AI
d) WF

View Answer

Answer: c
Explanation: AI refers to auto increment flag.




10 - Question

If any change in sensor value is detected at the end of a sensor matrix scan, then the IRQ line
a) goes low
b) goes high
c) remains unchanged
d) none

View Answer

Answer: b
Explanation: In sensor matrix mode, the IRQ line goes high, if any change in sensor value is detected at the end of a sensor matrix scan or the sensor RAM has a previous entry to be read by the CPU.

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