Engineering Questions with Answers - Multiple Choice Questions

MCQs on Semiconductor Memory Interfacing

1 - Question

The semiconductor memories are organised as __________ dimension(s) of array of memory locations.
a) one dimensional
b) two dimensional
c) three dimensional
d) none

View Answer

Answer: b
Explanation: The semiconductor memories are organised as two dimensions of an array which consists of rows and columns.




2 - Question

If a location is selected, then all the bits in it are accessible using a group of conductors called
a) control bus
b) address bus
c) data bus
d) either address bus or data bus

View Answer

Answer: c
Explanation: The bits in a selected location are accessible using data bus.




3 - Question

To address a memory location out of N memory locations, the number of address lines required is
a) log N (to the base 2)
b) log N (to the base 10)
c) log N (to the base e)
d) log (2N) (to the base e)

View Answer

Answer: a
Explanation: For n memory locations, log n(to the base of 2) address lines are required. For addressing 4K bytes of memory, 12 address lines are required since log(4KB) =log(4*1024)=log(212)=12.




4 - Question

If the microprocessor has 10 address lines, then the number of memory locations it is able to address is
a) 512
b) 1024
c) 2048
d) none

View Answer

Answer: b
Explanation: Since for n address lines, the number of memory locations able to address is 2^n.




5 - Question

In static memory, the upper 8-bit bank of an available 16-bit memory chip is called
a) upper address memory bank
b) even address memory bank
c) static upper memory
d) odd address memory bank

View Answer

Answer: d
Explanation: In static memory, the upper 8-bit bank is called odd address memory bank.




6 - Question

In static memory, the lower 8-bit bank of an available 16-bit memory chip is called
a) lower address memory bank
b) even address memory bank
c) static lower memory bank
d) odd address memory bank

View Answer

Answer: b
Explanation: In static memory, the lower 8-bit bank is called even address memory bank.




7 - Question

In most of the cases, the method used for decoding that may be used to minimise the required hardware is
a) absolute decoding
b) non-linear decoding
c) linear decoding
d) none

View Answer

Answer: c
Explanation: In general, linear decoding is used to minimise the required hardware.




8 - Question

To obtain 16-bit data bus width, the two 4K*8 chips of RAM and ROM are arranged in
a) parallel
b) serial
c) both serial and parallel
d) neither serial nor parallel

View Answer

Answer: a
Explanation: The two 4K*8 chips of RAM and ROM are arranged in parallel.




9 - Question

If (address line) Ao=0 then, the status of address and memory are
a) address is even and memory is in ROM
b) address is odd and memory is in ROM
c) address is even and memory is in RAM
d) address is odd and memory is in RAM

View Answer

Answer: c
Explanation: If Ao=0 then address is even and is in RAM. If Ao=1 then, address is odd and is in RAM.




10 - Question

If at a time Ao and BHE(active low) both are zero then, the chip(s) selected will be
a) RAM
b) ROM
c) RAM and ROM
d) ONLY RAM

View Answer

Answer: c
Explanation: If at a time Ao and BHE(active low) both are zero, then both RAM and ROM are selected.

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