Engineering Questions with Answers - Multiple Choice Questions

MCQs on Basic Peripherals-2

1 - Question

MCQs on RS232
Which of the following can be used for long-distance communication?
a) I2C
b) Parallel port
c) SPI
d) RS232
View Answer Answer: d
Explanation: A slightly different serial port called RS232 is used for long distance communication, otherwise the clock may get skewed. The low voltage signal also affects the long distance communication.



2 - Question

Which of the following can affect the long distance communication?
a) clock
b) resistor
c) inductor
d) capacitor
View Answer Answer: a
Explanation: For small distance communication, the clock signal which allows a synchronous transmission of data is more than enough, and the low voltage signal of TTL or CMOS is sufficient for the operation. But for long distance communication, the clock signal may get skewed and the low voltage can be affected by the cable capacitance. So for long distance communication RS232 can be used.



3 - Question

Which are the serial ports of the IBM PC?
a) COM1
b) COM4 and COM1
c) COM1 and COM2
d) COM3
View Answer Answer: c
Explanation: The IBM PC has one or two serial ports called the COM1 and the COM2, which are used for the data transmission between the PC and many other peripheral units like a printer, modem etc. advertisement



4 - Question

Which of the following can provide hardware handshaking?
a) RS232
b) Parallel port
c) Counter
d) Timer
View Answer Answer: a
Explanation: In RS232, several lines are used for transmitting and receiving data and these also provide control for the hardware handshaking.



5 - Question

Which of the following have an asynchronous data transmission?
a) SPI
b) RS232
c) Parallel port
d) I2C
View Answer Answer: b
Explanation: The data is transmitted asynchronously in RS232 which enhance long distance communication, whereas SPI, I2C offers short distance communication, and therefore, they are using synchronous data transmission.



6 - Question

How many areas does the serial interface have?
a) 1
b) 3
c) 2
d) 4
View Answer Answer: c
Explanation: The serial interface is divided into two, physical interface and the electrical interface.



7 - Question

The RS232 is also known as
a) UART
b) SPI
c) Physical interface
d) Electrical interface
View Answer Answer: d
Explanation: The RS232 is also known as the physical interface and it is also known as EIA232.



8 - Question

How much voltage does the MC1489 can take?
a) 12V
b) 5V
c) 3.3V
d) 2.2V
View Answer Answer: b
Explanation: The MC1489 is an interface chip which can take a 5V and generate internally the other voltages which are needed to meet the interface specification.



9 - Question

Which of the following is not a serial protocol?
a) SPI
b) I2C
c) Serial port
d) RS232
View Answer Answer: d
Explanation: The RS232 is a physical interface. It does not follow the serial protocol.



10 - Question

Which of the following is an ideal interface for LCD controllers?
a) SPI
b) parallel port
c) Serial port
d) M-Bus
View Answer Answer: d
Explanation: M-Bus or Motorola Bus is an ideal interface for LCD controllers, A/D converters, EEPROMs and many other components which can benefit faster transmission.



11 - Question

MCQs on UART-1
What does UART stand for?
a) universal asynchronous receiver transmitter
b) unique asynchronous receiver transmitter
c) universal address receiver transmitter
d) unique address receiver transmitter
View Answer Answer: a
Explanation: The UART or universal asynchronous receiver transmitter is used for the data transmission at a predefined speed or baud rate.



12 - Question

How is data detected in a UART?
a) counter
b) timer
c) clock
d) first bit
View Answer Answer: c
Explanation: The data can be detected by the local clock reference which is generated from the baud rate generator.



13 - Question

Which of the signal is set to one, if no data is transmitted?
a) READY
b) START
c) STOP
d) TXD
View Answer Answer: d
Explanation: The TXD signal goes to logic one when no data is transmitted. When data transmit, it sets to logic zero. advertisement



14 - Question

What rate can define the timing in the UART?
a) bit rate
b) baud rate
c) speed rate
d) voltage rate
View Answer Answer: b
Explanation: The timing is defined by the baud rate in which both the transmitter and receiver are used. The baud rate is supplied by the counter or an external timer called baud rate generator which generates a clock signal.



15 - Question

How is the baud rate supplied?
a) baud rate voltage
b) external timer
c) peripheral
d) internal timer
View Answer Answer: b
Explanation: The baud rate is supplied by the counter or an external timer called baud rate generator which generates a clock signal.



16 - Question

Which is the most commonly used UART?
a) 8253
b) 8254
c) 8259
d) 8250
View Answer Answer: d
Explanation: The Intel 8253, 8254 and 8259 are timers whereas Intel 8250 is a UART which is commonly used.



17 - Question

Which company developed 16450?
a) Philips
b) Intel
c) National semiconductor
d) IBM
View Answer Answer: c
Explanation: The Intel 8250 is replaced by the 16450 and 16550 which are developed by the National Semiconductors. 16450 is a chip which can combine all the PC’s input output devices into a single piece of silicon.



18 - Question

What does ADS indicate in 8250 UART?
a) address signal
b) address terminal signal
c) address strobe signal
d) address generating signal
View Answer Answer: c
Explanation: The ADS is address strobe signal and is working as active low in 8250 UART. The ADS signal is used to latch the address and chip select signals while processor access.



19 - Question

Which of the following signals are active low in the 8250 UART?
a) BAUDOUT
b) DDIS
c) INTR
d) MR
View Answer Answer: a
Explanation: The BAUDOUT signal is active low whereas DDIS, INTR and MR are active high in the 8250 UART. BAUDOUT is the clock signal from the transmitter part of the UART. DDIS signal goes low when the CPU is reading data from the UART. INTR is the interrupt pin. MR is the master reset pin.



20 - Question

Which of the signal can control bus arbitration logic in 8250?
a) MR
b) DDIS
c) INTR
d) RCLK
View Answer Answer: b
Explanation: DDIS signal goes low when the CPU is reading data from the UART and it also controls the bus arbitration logic.



21 - Question

MCQs on UART-2
Which of the following is used to reset the device in 8250?
a) MR
b) DDIS
c) INTR
d) RCLK
View Answer Answer: a
Explanation: MR is the master reset pin which helps to reset the device and restore the internal registers.



22 - Question

Which provides an input clock for the receiver part of the UART 8250?
a) RD
b) RCLK
c) MR
d) DDIS
View Answer Answer: b
Explanation: RCLK provides an input clock for the receiver part of the UART. RD is the read signal. MR is the master reset pin and DDIS is used to control bus arbitration logic.



23 - Question

Which of the following is a general purpose I/O pin?
a) OUT1
b) RD
c) ADS
d) MR
View Answer Answer: a
Explanation: There are two general purposes I/O pin OUT1 and OUT2. OUT1 is set by the programming bit 2 of the MCR to a ‘1’ whereas OUT2 is set by the programming bit 3 of the MCR to ‘1’. These are active low pins in 8250. advertisement



24 - Question

Which of the following indicate the type of access that the CPU needs to perform?
a) MR
b) RD
c) ADS
d) RCLK
View Answer Answer: b
Explanation: RD and WR signals are indicating the type of access that the CPU needs to perform, that is, whether it is a read cycle or write cycle.



25 - Question

Which pins are used for additional DMA control?
a) RXRDY
b) RD
c) MR
d) INR
View Answer Answer: a
Explanation: The RXRDY and TXRDY are two active low pins which are used for additional DMA control. It can be used for DMA transfers to and from the read and write buffers.



26 - Question

Which of the following are not used within the IBM PC?
a) TXRDY
b) BAUDOUT
c) ADS
d) OUT2
View Answer Answer: a
Explanation: The CPU is responsible for moving data to and from the UART in the IBM PC, therefore it does not have TXRDY and RXRDY pins which are used for DMA accessing.



27 - Question

Which pins are used to connect an external crystal?
a) INR
b) ADS
c) XIN
d) SIN
View Answer Answer: c
Explanation: The XIN and XOUT pins are used to connect an external crystal. These pins can also connect an external clock.



28 - Question

Which UART is used in MC680 by 0 design?
a) Intel 8250
b) 16450
c) 16550
d) MC68681
View Answer Answer: d
Explanation: The MC68681 is a standard UART developed by Motorola. It has been used in many MC680 by 0 designs.



29 - Question

Which of the following have large FIFO buffer?
a) 8253
b) 8250
c) 16550
d) 16450
View Answer Answer: c
Explanation: The largest buffer of 16 bytes is available on 16550 UART which is used for high speed data communications.



30 - Question

Which of the following has a quadruple buffered receiver and a double buffered transmitter?
a) Intel 8250
b) 16450
c) 16550
d) MC68681
View Answer Answer: d
Explanation: The MC68681 is a standard UART developed by Motorola. It possess a quadruple buffered receiver and a double buffered transmitter.



31 - Question

MCQs on Asynchronous Flow Control
Which can prevent the terminal of data transmission?
a) flow control
b) increasing flow
c) increasing count
d) terminal count
View Answer Answer: a
Explanation: The flow control can prevent data transmission. It can also prevent the computer from sending more data than the other can cope with.



32 - Question

Which of the following is the first flow control method?
a) software handshaking
b) hardware handshaking
c) UART
d) SPI
View Answer Answer: b
Explanation: The first flow control method is the hardware handshaking in which the hardware in the UART detects the potential overrun and it will assert a handshake line to tell the other UART to stop the transmission.



33 - Question

Which one of the following is the second method for flow controlling?
a) hardware
b) peripheral
c) software
d) memory
View Answer Answer: c
Explanation: In the first method of flow control, there is a chance of data loss. So the second method of the flow control is adopted in which it uses software to send characters XON and XOFF. XOFF can stop the data transfer and XON can restart the data transfer. advertisement



34 - Question

Which can restart the data transmission?
a) XON
b) XOFF
c) XRST
d) restart button
View Answer Answer: a
Explanation: The second method of flow control is called software which is based on certain characters called XON and XOFF. XOFF can stop the data transfer and XON can restart the data transfer.



35 - Question

Which of the following is a common connector?
a) UART
b) SPI
c) I2C
d) DB-25
View Answer Answer: d
Explanation: There are two connectors which are used very commonly. They are DB-25 and DB-9 which has 25 pins and 9 pins respectively.



36 - Question

What does pin 22 in DB-25 indicate?
a) transmit data
b) receive data
c) ring indicator
d) signal ground
View Answer Answer: c
Explanation: The 22nd pin in DB-25 and the 9th pin in the DB-9 indicates a ring indicator which is asserted when a connected modem has detected an incoming call.



37 - Question

Which pin indicates the DSR in DB-25?
a) 1
b) 2
c) 4
d) 6
View Answer Answer: d
Explanation: The 6th pin in DB-25 indicates DSR, that is, data set ready which indicates that each side is powered on and is ready to access data.



38 - Question

Which of the following connections are one to one?
a) Modem cables
b) SPI
c) UART
d) I2C
View Answer Answer: a
Explanation: The modem cables are straight cables which allow one to one connections without crossover.



39 - Question

Which of the following are used to link PCs?
a) modem cable
b) null modem cable
c) serial port
d) parallel port
View Answer Answer: b
Explanation: The modem cables are used to link PC with other peripherals like printers, plotters, modems etc. But it cannot link with other PCs. So an alternative method is adopted to link PCs which is called null modem cable.



40 - Question

Which of the following method is used by Apple Macintosh?
a) hardware handshaking
b) software handshaking
c) no handshaking
d) null modem cable
View Answer Answer: b
Explanation: The Apple Macintosh and UNIX use software handshaking for the data transmission where the characters are sent to control the flow of characters between two systems.



41 - Question

MCQs on DMA
Which of the following provides an efficient method for transferring data from a peripheral to memory?
a) dma controller
b) serial port
c) parallel port
d) dual port
View Answer Answer: a
Explanation: The DMA controllers or direct memory access controller provides an efficient method for transferring data from the peripheral to the memory.



42 - Question

Which of the following can be adopted for the systems which does not contain DMA controller for data transmission?
a) counter
b) timer
c) polling
d) memory
View Answer Answer: c
Explanation: The polling and interrupt helps for data transmission for the systems which do not have DMA controller.



43 - Question

Which of the following have low-level buffer filling?
a) output
b) peripheral
c) dma controller
d) input
View Answer Answer: c
Explanation: The DMA controller can initiate and control the bus access between I/O devices and memory, and also between two different memory areas. Therefore, the DMA controller can act as a hardware implementation of low-level buffer filling or emptying the interrupt. advertisement



44 - Question

How many classifications of DMA controllers are made based on the addressing capability?
a) 2
b) 3
c) 4
d) 5
View Answer Answer: b
Explanation: There are three classifications for the DMA controllers based on the address capability. These are 1D, 2D and 3D.



45 - Question

How many address register are there for the 1D type DMA controller?
a) 1
b) 2
c) 3
d) 4
View Answer Answer: a
Explanation: The 1D controller only have a single address register whereas 2D controller have two address register and 3D controller have three or more address register.



46 - Question

Which of the following of a generic DMA controller contain a base address register and an auto-incrementing counter?
a) address bus
b) data bus
c) bus requester
d) address generator
View Answer Answer: d
Explanation: The generic controller have several components associated with it for controlling the operation and one such is the address generator. It consists of the base address register and an auto-incrementing counter which increment the address after every transfer.



47 - Question

Which of the following is used to transfer the data from the DMA controller to the destination?
a) data bus
b) address bus
c) request bus
d) interrupt signal
View Answer Answer: a
Explanation: The data bus is used for the transmission of data from the DMA controller to the destinal. The DMA controller can directly select the peripheral in some cases in which the data transfer is made from the peripheral to the memory.



48 - Question

Which of the following is used to request the bus from the main CPU?
a) data bus
b) address bus
c) bus requester
d) interrupt signal
View Answer Answer: c
Explanation: The bus requester requests the bus from the main CPU. In earlier design, the processor bus does not support the multi master system and there were no bus request signals. In such cases, the processor clock was extended.



49 - Question

Which signal can identify the error?
a) data bus
b) address bus
c) bus requester
d) interrupt signal
View Answer Answer: d
Explanation: The interrupt signal can identify the error occurred in the DMA controller. This makes the processor to reprogram the DMA controller for a different transfer.



50 - Question

Which signal allows the DMA controller to select the peripheral?
a) local peripheral control
b) global peripheral control
c) address bus
d) data bus
View Answer Answer: a
Explanation: The local peripheral control allows the DMA controller to select the peripheral.



51 - Question

MCQs on DMA-II
Which of the following is also known as implicit address? a) dual address model b) single address model c) 1D model d) 2D model
View Answer Answer: b Explanation: The single address model is also known as implicit model because the second address is implied and is not directly given, that is, the source address is not supplied.



52 - Question

Which address mode uses two addresses and two accesses to transfer the data between the peripheral and the memory? a) dual address model b) 1D model c) 2D model d) 3D model
View Answer Answer: a Explanation: The dual address mode supports two addresses and two accesses for transferring data between a peripheral or memory and another memory location.



53 - Question

Which of the following address mode uses a buffer to hold data temporarily? a) 1D model b) 2D model c) dual address model d) 3D model
View Answer Answer: c Explanation: The dual address mode supports two addresses and two accesses for transferring data between a peripheral or memory and another memory location, which also consumes two bus cycles and a buffer within the DMA controller to hold data temporarily. advertisement



54 - Question

Which of the following model can implement a circular buffer? a) dual address mode b) 1D model c) 2D model d) 3D model
View Answer Answer: b Explanation: The 1D model can implement a circular buffer which makes an automatic reset to bring the address back to the beginning.



55 - Question

Which of the following uses an address and a counter to define the sequence of addresses? a) dual address mode b) 2D model c) 1D model d) 3D model
View Answer Answer: c Explanation: The 1D model of the DMA controller uses an address location and a counter to define the address sequence which is used during the DMA cycles.



56 - Question

Which of the following is used to calculate an offset to base address? a) single address mode b) dual address mode c) 1D model d) 2D model
View Answer Answer: d Explanation: An address stride is specified which can be used for calculating the offset to the base address at the terminal of count. This address stride is used in the 2D model of the DMA controller.



57 - Question

Which can provide an address stride? a) single address mode b) dual address mode c) 1D model d) 2D model
View Answer Answer: d Explanation: In the 2D model of the DMA controller, an address stride is specified which can be used for calculating the offset to the base address at the terminal of count.



58 - Question

How is the count register can be splitted? a) 2 b) 3 c) 4 d) 5
View Answer Answer: a Explanation: In the 2D model of the DMA controller, in addition to the address stride there is a count register which can be split into two, in which one register is used to specify the count for the block and the second register is used to define the total number of blocks or the bytes to be transferred.



59 - Question

Which of the following has the ability to change the stride automatically? a) 1D model b) 2D model c) 3D model d) dual address mode
View Answer Answer: c Explanation: In the 3D model of the DMA controller, it have the ability to change the address stride automatically so that blocks of different sizes and stride can be created.



60 - Question

Which is used to prioritise multiple requests? a) dual address mode b) single address mode c) arbitration d) chaining
View Answer Answer: c Explanation: The arbitration is used to provide priority for multiple access. This uses a priority scheme which may offer fair priority to the one channel, or a high priority to the other channel and so on. Such condition is otherwise known as round-robin condition in which the priority is equally divided.



61 - Question

MCQs on Implementation of DMA
Which of the following DMA is used in the IBM PC?
a) Intel 8253
b) Intel 8254
c) Intel 8237
d) Intel 8259
View Answer Answer: c
Explanation: The Intel 8237 is the DMA used in the IBM PC. 8253, 8254 and 8259 are timers developed by Intel.



62 - Question

Which of the following have four transfer modes?
a) Intel 8253
b) Intel 8254
c) Intel 8259
d) Intel 8237
View Answer Answer: d
Explanation: The Intel 8237 have four transfer modes. These are single mode, block transfer mode, demand mode and cascade mode.



63 - Question

Identify the additional transfer mode in the Intel 8237?
a) single transfer mode
b) demand transfer mode
c) verify transfer mode
d) block transfer mode
View Answer Answer: c
Explanation: In addition to the four main transfer mode, there is a verify transfer mode which is used within the PC to create dummy addresses which are used for refreshing the DRAM. advertisement



64 - Question

Which of the following transfer mode can refresh the DRAM memory?
a) verify transfer mode
b) bloch transfer mode
c) demand transfer mode
d) cascade mode
View Answer Answer: a
Explanation: The verify address transfer mode can generate dummy addresses which are used for the DRAM refreshing.



65 - Question

Which of the following is used for supporting the priority scheme?
a) address transfer mode
b) arbitration
c) counter
d) timer
View Answer Answer: b
Explanation: The arbitration is used for providing priority to the DMA requests. The DMA request is simultaneously generating, so in order to avoid the errors, a priority scheme is necessary which is done by the arbitration scheme in the DMA controller.



66 - Question

Which of the following consist of a fully programmable DMA controller of two channels?
a) MC68300
b) Intel 8237
c) Intel 8253
d) Intel 8254
View Answer Answer: a
Explanation: The MC68300 is developed by Motorola, which consists of a two channel fully programmable DMA controller which can support high speed data transfer.



67 - Question

Which cycle can support the burst and single transfer mode?
a) internal
b) external
c) both internal and external
d) address cycle
View Answer Answer: b
Explanation: The internal cycles can be programmed to occupy the partial or complete fulfillment of the available internal bus bandwidth while the external cycles provides support to the single transfer modes and burst mode.



68 - Question

Which of the following requires its own local memory and program?
a) DMA controller
b) DMA address
c) DMA CPU
d) DMA peripheral
View Answer Answer: c
Explanation: The DMA CPU has its own address local memory and program so that it will not harm main memory bus and it is completely isolated.



69 - Question

Which DMA is programmed with higher level software?
a) DMA controller
b) DMA address
c) DMA peripheral
d) DMA CPU
View Answer Answer: d
Explanation: The DMA CPU is programmed with higher level software which is used to transfer the data and for processing it.



70 - Question

Which of the following combine an MC68000/MC68020 type of processor with peripheral and DMA controllers?
a) Intel 8237
b) Intel 8253
c) MC68300
d) MC68000
View Answer Answer: c
Explanation: The MC68300 combines the processors along with the DMA controllers. The processors which support the MC68300 series are MC68000 or MC68020.

Get weekly updates about new MCQs and other posts by joining 18000+ community of active learners