Engineering Questions with Answers - Multiple Choice Questions

MCQs on 80286 Minimum System Configuration, Interfacing Memory and I/O Devices With 80286

1 - Question

Which of the following is a supporting chip of 80286?
a) interrupt controller
b) clock generator
c) bus controller
d) all of the mentioned

View Answer
Answer: d
Explanation: The interrupt controller 8259A, clock generator 82C284, and bus controller 82C288 are the unavoidable members of the family, of supporting chips of 80286.

 




2 - Question

In minimum mode, the function of 80286 is
a) data transfers to/from memory or I/O
b) controls the data transfer of 80287
c) controls the instruction execution of 80287
d) all of the mentioned

View Answer

Answer: d
Explanation: In a minimum mode, the 80286 carries out all the data transfers to/from memory or I/O, controls the data transfer, and instruction execution of 80287.




3 - Question

The signal that is applied to the decoding logic, to differentiate between interrupt, code fetch and data bus cycles is
a) COD
b) INTA (active low)
c) M/IO (active low)
d) All of the mentioned

View Answer

Answer: d
Explanation: The COD, INTA (active low), M/IO (active low) signals are applied to the decoding logic, to differentiate between interrupt, I/O, code fetch, and data bus cycles.




4 - Question

By adding which of the following, the minimum mode of 80286 gives the multibus interface of 80286?
a) bus controller
b) bus arbiter
c) interrupt controller
d) all of the mentioned

View Answer

Answer: b
Explanation: The addition of single chip 82C289 known as bus arbiter, to the configuration of 80286 minimum mode, gives the multibus structure of 80286.




5 - Question

The number of bus controllers that are used for interfacing of memory and I/O devices is
a) 1
b) 2
c) 3
d) none of the mentioned

View Answer

Answer: b
Explanation: The interfacing of memory and I/O devices, uses two 82288 bus controllers, one each for local, and system bus.




6 - Question

If the 80286 need to use system bus, then the signal that is to be active is
a) SRDY
b) SRDYEN
c) ARDYEN
d) ARDY

View Answer

Answer: c
Explanation: The ARDYEN pin is to be activated if the 80286 is to use the system bus. The SRDYEN pin is to be grounded.




7 - Question

If MBYTES input is high, then the pin serves as
a) AEN
b) CEN
c) AEN and CEN
d) None of the mentioned

View Answer

Answer: a
Explanation: The MBYTES input selects the function of AEN/CEN pin. If MBYTES is high, the pin serves as AEN, else it serves as CEN. The CEN pin is used for selecting one of the available 82288s.




8 - Question

Latches are used in 80286 to
a) demultiplex the address and data lines
b) latch the address signals
c) decode the select signals
d) latch the address and decode the select signals

View Answer

Answer: d
Explanation: The address and data lines are not multiplexed, hence no latches are required in 80286 system. Rather the addresses of the next bus cycle are displayed in advance, hence the latches are required for latching the address, and decode the signals.




9 - Question

The I/O port addresses, that are not used, while designing practical systems around 80286 are
a) 0000H to 00FFH
b) 00FFH to FFFFH
c) 00F8H to 00FFH
d) 0000H to FFFFH

View Answer

Answer: c
Explanation: The I/O port addresses 00F8H to 00FFH are reserved by Intel, hence these should not be used while designing practical systems around 80286.

Get weekly updates about new MCQs and other posts by joining 18000+ community of active learners